`timescale 1ns/1ns module mux4_1( input [1:0]d1,d2,d3,d0, input [1:0]sel, output[1:0]mux_out ); //*************code***********// wire [1:0]d1,d2,d3,d0; wire [1:0]sel; wire [1:0]mux_out; assign ...