题解 | #移位运算与乘法#

`timescale 1ns/1ns
module multi_sel(
input [7:0]d ,
input clk,
input rst,
output reg input_grant,
output reg [10:0]out
);
//*************code***********//
reg [1:0] cnt;
wire [7:0] d_r;
assign d_r = (cnt == 2'd0) ? d : d_r;

always@(posedge clk or negedge rst) begin
    if(!rst)
        cnt <= 2'b0;
    // else if(cnt == 2'd3)
    //     cnt <= 2'b0;
    else cnt <= cnt + 1'b1;
end

always@(posedge clk or negedge rst) begin
    if(!rst)
        out <= 11'b0;
    else if(cnt == 2'd0)
        out <= d_r;
    else if(cnt == 2'd1)
        out <= (d_r<<2)-d_r;
    else if(cnt == 2'd2)
        out <= (d_r<<3)-d_r;    
    else if(cnt == 2'd3)
        out <= (d_r<<3);
end

always@(posedge clk or negedge rst) begin
    if(!rst)
        input_grant <= 1'b0;
    else if(cnt == 2'd0)
        input_grant <= 1'b1;
    else input_grant <= 1'b0;
end
//*************code***********//
endmodule