题解 | #任意奇数倍时钟分频#

`timescale 1ns/1ns

module clk_divider
    #(parameter dividor = 5)
( 	input clk_in,
	input rst_n,
	output clk_out
);

reg	[$clog2(dividor)-1:0]	cnt;
reg	clk_n,clk_p;

always@(posedge clk_in or negedge rst_n)
	if(!rst_n)
		cnt	<=	0;
	else	if(cnt ==dividor - 1)
		cnt	<=	0;
	else	
		cnt	<=	cnt + 1;


always@(posedge clk_in or negedge rst_n)
	if(!rst_n)
		clk_p	<=	1'b0;
	else	if(cnt==dividor >> 1)
		clk_p	<=	1'b1;
	else	if(cnt==dividor - 1)
		clk_p	<=	1'b0;

always@(negedge clk_in or negedge rst_n)
	if(!rst_n)
		clk_n	<=	1'b0;
	else	if(cnt==dividor >> 1)
		clk_n	<=	1'b1;
	else	if(cnt==dividor - 1)
		clk_n	<=	1'b0;

assign	clk_out	= (clk_p | clk_n);


endmodule