题解 | #逻辑运算#

`timescale 1ns/1ns

module top_module (
	input a,
	input b,
	input c,
	input d,
	output e,
	output f );
wire r_and,r_or;
assign r_and=a&b;
assign r_or=c|d;
assign f=r_and^r_or;
assign e=r_and~^r_or;//~(a^b)=a~^b;

endmodule