题解 | #4bit超前进位加法器电路#

`timescale 1ns/1ns

module lca_4(
	input		[3:0]       A_in  ,
	input	    [3:0]		B_in  ,
    input                   C_1   ,
 
 	output	 wire			CO    ,
	output   wire [3:0]	    S
);

wire  [3:0] p;
wire  [3:0] g;
wire  [4:0] c;

genvar i;
generate 
	for (i=0;i<4;i=i+1) begin:pg_4
	pg_gen pg(
		.a(A_in[i]),
		.b(B_in[i]),
		.p(p[i]),
		.g(g[i])
	);
	end
endgenerate

assign c[0] = C_1;
genvar k;
generate 
	for(k=0;k<4;k=k+1) begin
	    assign c[k+1] = g[k] | p[k]&c[k];
	    assign S[k] = p[k]^c[k]; 
	end
endgenerate

assign CO = c[4];

endmodule

module pg_gen(
	input  a,
	input  b,
	output p,
	output g
);

assign  g =a&b;
assign  p =a^b;

endmodule