题解 | #4位数值比较器电路#

门级描述：基本门电路：&,|,!,^,^~

参考题解两种方法：

法一：

A==B： 同或 --> Y0= ~(A^B)

A<B: 首先AB不相等（异或）其次B为1 -->Y1= (A^B)&B

A>B: 相似的， -->Y2= (A^B)&A

行为级描述就是从最高位依次比较

assign Y1 = A[0]==B[0] & A[1]==B[1] & A[2]==B[2] & A[3]==B[3];
assign Y2 = (A[3]>B[3]) |
            (A[3]==B[3] & A[2]>B[2]) |
            (A[3]==B[3] & A[2]==B[2] & A[1]>B[1]) |
            (A[3]==B[3] & A[2]==B[2] & A[1]==B[1] & A[0]>B[0]);
assign Y0 = ......;

门级描述

assign Y1 = ~(A[0]^B[0]) & ~(A[1]^B[1]) & ~(A[2]^B[2]) & ~(A[3]^B[3]);
     
assign Y2 = ((A[3]^B[3])&A[3]) |
         (~(A[3]^B[3]) & ((A[2]^B[2])&A[2])) |
        (~(A[3]^B[3]) & ~(A[2]^B[2]) & ((A[1]^B[1])&A[1])) |
        (~(A[3]^B[3]) & ~(A[2]^B[2]) & ~(A[1]^B[1]) & ((A[0]^B[0])&A[0]));
                 
assign Y0 = ((A[3]^B[3])&B[3]) |
        (~(A[3]^B[3]) & ((A[2]^B[2])&B[2])) |
        (~(A[3]^B[3]) & ~(A[2]^B[2]) & ((A[1]^B[1])&B[1])) |
        (~(A[3]^B[3]) & ~(A[2]^B[2]) & ~(A[1]^B[1]) & ((A[0]^B[0])&B[0]));

法二：

assign Y2 = A & (!B);
assign Y0 = (!A) & B;
assign Y1 = !(Y2 | Y0);

`timescale 1ns/1ns

module comparator_4(
	input		[3:0]       A   	,
	input	   [3:0]		B   	,
 
 	output	 wire		Y2    , //A>B
	output   wire        Y1    , //A=B
    output   wire        Y0      //A<B
);

wire W_y2[0:3];
wire W_y1[0:3];
wire W_y0[0:3];

genvar gen_i;
for (gen_i = 0; gen_i < 4; gen_i = gen_i + 1) begin
	compare_1 compare_1_u(
	.A (A[gen_i]   ),
    .B (B[gen_i]   ),
	.Y2(W_y2[gen_i]),//A>B
	.Y1(W_y1[gen_i]),//A=B
	.Y0(W_y0[gen_i]) //A<B
);
end

assign Y2 = W_y2[3] | ((W_y1[3]) & (W_y2[2])) | ((W_y1[3]) & (W_y1[2]) & (W_y2[1])) | ((W_y1[3]) & (W_y1[2]) & (W_y1[1]) & (W_y2[0]));
assign Y0 = W_y0[3] | ((W_y1[3]) & (W_y0[2])) | ((W_y1[3]) & (W_y1[2]) & (W_y0[1])) | ((W_y1[3]) & (W_y1[2]) & (W_y1[1]) & (W_y0[0]));
assign Y1 = W_y1[3] & W_y1[2] & W_y1[1] & W_y1[0];



endmodule 

module compare_1(
	input A,
	input B,
	output Y2,//A>B
	output Y1,//A=B
	output Y0 //A<B
);

assign Y2 = A & (!B);
assign Y0 = (!A) & B;
assign Y1 = !(Y2 | Y0);


endmodule

下面是大佬得解法，暂时为看懂，之后再看

`timescale 1ns/1ns

module comparator_4(
	input		[3:0]       A   	,
	input	   [3:0]		B   	,
 
 	output	 wire		Y2    , //A>B
	output   wire        Y1    , //A=B
    output   wire        Y0      //A<B
);

    //求~B，方便比较A>B
    not (_B3,B[3]);
    not (_B2,B[2]);
    not (_B1,B[1]);
    not (_B0,B[0]);
    
    //每一位比较A>B还是A=B
    and (A3_B3,A[3],_B3);//A[3]>B[3]
    xnor (A3B3,A[3],B[3]);//A[3]=B[3]
    and (A2_B2,A[2],_B2);
    xnor (A2B2,A[2],B[2]);
    and (A1_B1,A[1],_B1);
    xnor (A1B1,A[1],B[1]);   
    and (A0_B0,A[0],_B0);
    xnor (A0B0,A[0],B[0]);  
    
    //Y1,A=B
    and (Y1,A3B3,A2B2,A1B1,A0B0);
    
    //Y2，A>B
    and (Y2_2,A3B3,A2_B2);
    and (Y2_3,A3B3,A2B2,A1_B1);
    and (Y2_4,A3B3,A2B2,A1B1,A0_B0);
    or (Y2,A1_B1,Y2_2,Y2_3,Y2_4);
    
    //Y0=((A>B)+(A<B))'=Y2'*Y1'
    not (_Y1,Y1);
    not (_Y2,Y2);
    and (Y0,_Y1,_Y2);

endmodule