题解 | #使用#

`timescale 1ns/1ns
module encoder_83(
   input      [7:0]       I   ,
   input                  EI  ,
   
   output wire [2:0]      Y   ,
   output wire            GS  ,
   output wire            EO    
);
assign Y[2] = EI & (I[7] | I[6] | I[5] | I[4]);
assign Y[1] = EI & (I[7] | I[6] | ~I[5]&~I[4]&I[3] | ~I[5]&~I[4]&I[2]);
assign Y[0] = EI & (I[7] | ~I[6]&I[5] | ~I[6]&~I[4]&I[3] | ~I[6]&~I[4]&~I[2]&I[1]);

assign EO = EI&~I[7]&~I[6]&~I[5]&~I[4]&~I[3]&~I[2]&~I[1]&~I[0];

assign GS = EI&(I[7] | I[6] | I[5] | I[4] | I[3] | I[2] | I[1] | I[0]);
//assign GS = EI&(| I);
         
endmodule

module encoder_164(
   input      [15:0]      A   ,
   input                  EI  ,
   
   output wire [3:0]      L   ,
   output wire            GS  ,
   output wire            EO    
);

wire EO1;
wire [2:0]Y0;
wire [2:0]Y1;
wire GS1;
wire GS0;


encoder_83 U0(
    .I(A[7:0]),
    .EI(EO1),
    .Y(Y0),
    .GS(GS0),
    .EO(EO)
);

encoder_83 U1(
    .I(A[15:8]),
    .EI(EI),
    .Y(Y1),
    .GS(GS1),
    .EO(EO1)
);

assign L[3] = GS1;
assign L[2] = Y0[2] | Y1[2];
assign L[1] = Y0[1] | Y1[1];
assign L[0] = Y0[0] | Y1[0];

assign GS = GS1 | GS0;



endmodule

看的第一个题解讲的很详细。

就是他的好像少定义了一个GS1；