题解 | #使用握手信号实现跨时钟域数据传输#

`timescale 1ns/1ns
module data_driver(
	input clk_a,
	input rst_n,
	input data_ack,
	output reg [3:0]data,
	output reg data_req
	);

	reg [2:0] cnt;
	reg data_ack_r1,data_ack_r2;

	always @(posedge clk_a or negedge rst_n) begin
		if(rst_n == 1'b0)begin
			data_ack_r1 <= 1'b0;
			data_ack_r2 <= 1'b0;
		end
		else
			data_ack_r1 <= data_ack;
			data_ack_r2 <= data_ack_r1;
	end

	always @(posedge clk_a or negedge rst_n) begin
		if(rst_n == 1'b0)
			data_req <= 1'b0;
		else if(cnt == 'd4)
			data_req <= 1'b1;
		else if(data_ack_r1 & !data_ack_r2)
			data_req <= 1'b0; //我的貌似延迟一拍，没有对齐
		else
			data_req <= data_req;
	end

	always @(posedge clk_a or negedge rst_n) begin
		if(rst_n == 1'b0)
			data <= 4'd0;
		else if(data_ack_r1 & !data_ack_r2)begin
			if(data == 'd7)
				data <= 'd0;
			else
				data <= data + 1'b1;
		end
		else
			data <= data;
	end

	always @(posedge clk_a or negedge rst_n) begin
		if(rst_n == 1'b0)
			cnt <= 'd0;
		else if(data_ack_r1 & !data_ack_r2)
			cnt <= 'd0;
		else if(data_req)
			cnt <= cnt;
		else
			cnt <= cnt + 1'b1;
	end

endmodule

module data_receiver(
	input clk_b,
	input rst_n,
	input [3:0] data,
	input data_req,
	output reg data_ack

);

reg data_req_r1,data_req_r2;
reg [3:0] data_r;

always @(posedge clk_b or negedge rst_n) begin
		if(rst_n == 1'b0)begin
			data_req_r1 <= 1'b0;
			data_req_r2 <= 1'b0;
		end
		else
			data_req_r1 <= data_req;
			data_req_r2 <= data_req_r1;
	end

always @(posedge clk_b or negedge rst_n) begin
	if(rst_n == 1'b0)
		data_ack <= 1'b0;
	else if(data_req_r1 & !data_req_r2)
		data_ack <= 1'b1;
	else if(!data_req_r1 & data_req_r2)
		data_ack <= 1'b0;
	else
	    data_ack <= data_ack;
end

always @(posedge clk_b or negedge rst_n) begin
	if(rst_n == 1'b0)
		data_r <= 4'd0;
	else if(data_req_r1 & !data_req_r2)
		data_r <= data;
	else
	   data_r <= data_r;
end

endmodule