简析

输入：data_in
输出：dataout
总体思路是将A时钟域的脉冲信号转换为电平信号，打两拍后再转换为B时钟域的脉冲信号。

代码

`timescale 1ns/1ns

module pulse_detect(
	input 				clk_fast	, 
	input 				clk_slow	,   
	input 				rst_n		,
	input				data_in		,

	output  		 	dataout
);
    reg data_level, data_level1, data_level2, data_level3;
    
  	// 脉冲信号转电平信号
    always@(posedge clk_fast or negedge rst_n) begin
        if(~rst_n)
            data_level <= 0;
        else
            data_level <= data_in? ~data_level: data_level;
    end
    
  	// 电平信号打两拍再转为脉冲信号
    always@(posedge clk_slow or negedge rst_n) begin
        if(~rst_n) begin
            data_level1 <= 0;
            data_level2 <= 0;
            data_level3 <= 0;
        end
        else begin
            data_level1 <= data_level;
            data_level2 <= data_level1;
            data_level3 <= data_level2;
        end
    end
    assign dataout = data_level3^data_level2;
endmodule