题解 | #256选1选择器#

`timescale 1ns/1ns

module top_module (
	input [255:0] in,
	input [7:0] sel,
	output  out
);
reg out_temp;
integer i;
always@(*)begin
	for(i=0;i<256;i=i+1)begin
		if(sel == i)begin
			out_temp = in[i];
		end
	end
end
assign out = out_temp;



endmodule