题解 | #自动贩售机1#

`timescale 1ns/1ns
module seller1(
	input wire clk  ,
	input wire rst  ,
	input wire d1 ,
	input wire d2 ,
	input wire d3 ,
	
	output reg out1,
	output reg [1:0]out2
);
//*************code***********//
reg		[2:0]	cnt ;
always @(posedge clk or negedge rst) begin
	if(!rst) begin
		cnt <= 3'b0 ;
	end
	else if(d1) begin
		cnt <= cnt +3'b1 ;
	end
	else if(d2) begin
		cnt <= cnt + 3'd2 ;
	end
	else if(d3) begin
		cnt <= cnt +3'd4 ;
	end
	else if(cnt >= 3'd3) begin
		cnt <= 3'd0 ;
	end
end
always @(posedge clk or negedge rst) begin
	if(!rst) begin
		out1 <= 1'b0 ;
	end
	else if(cnt >=3'd3) begin
		out1 <=1'b1 ;
	end
	else begin
		out1 <= 1'b0 ;
	end
end
always @(posedge clk or negedge rst) begin
	if(!rst) begin
		out2 <= 2'b0 ;
	end
	else if(cnt >=3'd3) begin
		out2 <=cnt - 3'd3 ;
	end
	else begin
		out2 <= 1'b0 ;
	end
end

//*************code***********//
endmodule