题解 | #移位运算与乘法#

`timescale 1ns/1ns
module multi_sel(
input [7:0]d ,
input clk,
input rst,
output reg input_grant,
output reg [10:0]out
);
//*************code***********//
reg [1:0] cnt;
reg [10:0] din;

always @ (posedge clk or negedge rst)
begin
if (!rst) begin
cnt<=0;
out<=0;
input_grant<=0;
din<=0;end
else begin
cnt<=cnt+1;
case(cnt)
2'd0:begin out<=d; input_grant <= 1 ;din <=d; end
2'd1:begin out<=(din<<2)-din; input_grant <= 0 ; end
2'd2:begin out<=(din<<3)-din; input_grant <= 0 ; end
2'd3:begin out<=din<<3; input_grant <= 0 ; end
endcase
end

end


//*************code***********//
endmodule