题解 | #整数倍数据位宽转换8to16#

`timescale 1ns/1ns
// 输出是输入的倍数，只需使用移位寄存器寄存，然后计数，在相同的计数值输出结果。
module width_8to16(
	input 				   clk 		,   
	input 				   rst_n		,
	input				      valid_in	,
	input	   [7:0]		   data_in	,
 
 	output	reg			valid_out,
	output   reg [15:0]	data_out
);

// 8bit to 16bit ; 8*2==16*1
reg[1:0 ]   cnt;
reg[11:0]	data_reg;

always@(posedge clk or negedge rst_n)begin
	if(!rst_n)
		cnt<=0;
	else if(valid_in)
		if(cnt==1)
			cnt<=0;
		else
			cnt <=cnt+1;
	else
		cnt<=cnt;
end

always@(posedge clk or negedge rst_n)begin
	if(!rst_n)
		data_reg <=0;
	else if(valid_in)
			data_reg <= {data_reg[15:8],data_in};
	else
		data_reg <= data_reg;

end

always@(posedge clk or negedge rst_n)begin
	if(!rst_n)
		valid_out <=0;
	else if(valid_in&&(cnt==1))
		valid_out <=1;
	else
		valid_out <=0;
end

always@(posedge clk or negedge rst_n)begin
	if(!rst_n)
		data_out <=0;
	else if(valid_in&&(cnt==1))
		data_out <={data_reg[7:0],data_in[7:0]};
	else 
		data_out <=data_out;
end

endmodule