题解 | #不重叠序列检测#
信号发生器
http://www.nowcoder.com/practice/39f6766689cc448e928a0921d1d1f858
````timescale 1ns/1ns
//该题意思不明确，刚刚进入三角波时，为下降趋势，所以注意down设置为1
module signal_generator(
input clk,
input rst_n,
input [1:0] wave_choise,
output reg [4:0]wave
);
reg[4:0]cnt;
reg down;
always @(posedge clk or negedge rst_n)begin
if(~rst_n)begin
wave <= 0;
cnt <= 0;
down <= 1;
end else begin
case(wave_choise)
2'd0:begin
if(cnt == 19)
cnt <= 0;
else
cnt <= cnt + 1'b1;
if(cnt == 5'd9)
wave <= 20;
else if(cnt == 5'd19)
wave <= 0;
end
2'd1:begin
wave <= (wave==20)? 0: wave+1'b1;
end
2'd2:begin
if(wave==20 && ~down)begin
wave <= wave-1;
down <= 1'b1;
end
else if(wave == 0 && down)begin
wave <= wave+1;
down <= 1'b0;
end
else if(down)
wave <= wave-1;
else
wave <= wave+1;
end
default:wave<=0;
endcase
end
end
endmodule
