`timescale 1ns/1ns module lca_4( input [3:0] A_in , input [3:0] B_in , input C_1 , output wire CO , output wire [3:0] S ); wire co1,co2,co3,co4; add inst1(.a(A_in[0]), .b(B_in[0]), .cin(C_1), .co(co1), .s(S[0])); add inst2(.a(A_in[1]), .b(B_i...
